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Introduction to Verilog

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Ok, I'd like to start giving Verilog lessons on the list. As this
goes along, we can clear up questions people have and turn them into
formal lessons on the wiki. Perhaps we can turn this into a book
under Creative Commons and perhaps sell a dead tree version for
fund-raising. But I'm getting ahead of myself. :)

I'd hate to bias this too much towards the semantics of Verilog, but
it's kinda hard to avoid it. What matters is the semantics of the
hardware and how to get that to happen given the particular language.
VHDL also translates into hardware, so although some of the semantics
are different, they aren't at all alien. So what I want to do is
teach HDL-based digital circuit design, using Verilog as a means of
expression.


- Tim Miller 2006-06-14

  • Verilog Lesson 1 - Signals
  • Verilog Lesson 2 - Arithmetic/Logic Operators
  • Verilog Lesson 3 - Combinatorial logic expressed behaviorally
  • Verilog Lesson 4 - Sequential Logic

Created by: hamish last modification: Sunday 21 of October, 2007 [01:40:44 UTC] by josephblack


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bartodeo
Perhaps we can turn this into a book
on: Fri 18 of Jun, 2010 [03:55 UTC] score: 0.00
Perhaps we can turn this into a book under Creative Commons and perhaps sell a dead tree version for fund-raising.
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author message
johndavis2161
Re: Perhaps we can turn this into a book
on: Mon 30 of Aug, 2010 [07:41 UTC] score: 0.00
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hidebr
Re: Perhaps we can turn this into a book
on: Sun 22 of Aug, 2010 [13:06 UTC] score: 0.00
> Perhaps we can turn this into a book under Creative Commons and perhaps sell a dead tree version for fund-raising.
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author message
bradblack
Re: Perhaps we can turn this into a book
on: Sat 07 of Aug, 2010 [07:28 UTC] score: 0.00
I'd hate to bias this too much towards the semantics of Verilog, but it's kinda hard to avoid it.
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author message
Tarun004
Re: Perhaps we can turn this into a book
on: Thu 05 of Aug, 2010 [15:07 UTC] score: 0.00
> Perhaps we can turn this into a book under Creative Commons and perhaps sell a dead tree version for fund-raising.
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matt44
answer
on: Mon 16 of Aug, 2010 [17:00 UTC] score: 0.00
Well, I am so glad that I have found this your post because I have been searching for some information about the Verilog almost two hours. You helped me a lot indeed and reading this your article I have found many new and useful information about this subject. Well, I will definitely bookmark your website and wait for other useful and informative posts like this one in the future. Regards, Matt Rickson from Oregon


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duke
verilog lesson
on: Thu 02 of Sep, 2010 [06:40 UTC] score: 0.00
thanks for the verilogs lesson. It is much appreciated.

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